GATE 2024 CSE Daily Practice Questions for 30 August 2023
Here are GATE 2024 CSE Daily Practice Questions for 30 August 2023. Solve these questions and enhance your Computer Science and Engineering preparation!
GATE 2024 CSE Daily Practice Questions for 30 August 2023: Students appearing for GATE 2024 examination and aspiring to get admission to computer science & information technology must regularly practice questions to get familiar with the examination pattern and syllabus. Start practicing GATE 2024 CSE daily practice questions provided below and analyse for preparation level!
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GATE 2024 General Aptitude Daily Practice Questions for 30 August 2023 |
GATE 2024 CSE Daily Practice Questions for 30 August 2023
Find GATE 2024 CSE daily practice questions below. Solve them and analyse your exam preparation.
Question 1: Let R1 and R2 be two 4-bit registers that store numbers in 2’s complement form. For the operation R1+R2, which one of the following values of R1 and R2 gives an arithmetic overflow?
(A) R1 = 1011 and R2 = 1110
(B) R1 = 1100 and R2 = 1010
(C) R1 = 0011 and R2 = 0100
(D) R1 = 1001 and R2 = 1111
Question 2: Consider the following two statements with respect to the matrices A(mxn) , B(nxm) , C(nxn) and D(nxn).
Statement 1: tr(AB) = tr(BA)
Statement 2: tr(CD) = tr(DC) where tr() represents the trace of a matrix.
Which one of the following holds?
(A) Statement 1 is correct and Statement 2 is wrong.
(B) Statement 1 is wrong and Statement 2 is correct.
(C) Both Statement 1 and Statement 2 are correct.
(D) Both Statement 1 and Statement 2 are wrong.
Question 3: Which of the following statements is/are TRUE with respect to deadlocks?
(A) Circular wait is a necessary condition for the formation of deadlock.
(B) In a system where each resource has more than one instance, a cycle in its wait-for graph indicates the presence of a deadlock.
(C) If the current allocation of resources to processes leads the system to unsafe state, then deadlock will necessarily occur.
(D) In the resource-allocation graph of a system, if every edge is an assignment edge, then the system is not in deadlock state.
Question 4: A certain processor uses a fully associative cache of size 16 kB. The cache block size is 16 bytes. Assume that main memory is byte addressable and uses a 32-bit address. How many bits are required for the Tag and the Index fields respectively in the addresses generated by the processor?
(A) 24 bits and 0 bits
(B) 28 bits and 4 bits
(C) 24 bits and 4 bits
(D) 28 bits and 0 bits
(A) Number of attributes of its relation schema.
(B) Number of tuples stored in the relation.
(C) Number of entries in the relation.
(D) Number of distinct domains of its relation schema.
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